For handheld products such as cell phones and digital cameras to get smaller, manufacturers must also shrink the devices’ silicon memory chips. But the tinier the chip, the more vulnerable it is to leaking the charge that stores data. Now researchers at the California Institute of Technology and Allentown, PA-based Agere Systems say they’ve devised a new-and inexpensive-way of fabricating leak-resistant memory that could provide chips with much greater storage capacity.
The technique applies to flash memory, which retains information even after power is turned off. As a conventional flash memory chip gets smaller, a critical layer of insulation that protects data stored as electric charges becomes thinner, risking charge leaks.
Electrical engineer Jan De Blauwe of Agere, applied physics and materials science professor Harry Atwater of Caltech and their colleagues have overcome this problem by creating a method for storing charges in a group of silicon nanocrystals grown and insulated individually at low cost. If one crystal fails, it doesn’t affect the information saved. “And because the charge storage is more robust,” says De Blauwe, “you can reduce the thickness of the insulating layer.”
Sandip Tiwari of Cornell University’s Nanofabrication Facility says the new technique is promising. “If reproducible, it could lead to some important improvements as we scale device structures to smaller dimensions,” he says. Theoretically, it could also allow flash memory manufacturers to pack 100 times more memory onto existing silicon chips.