The new transistors (above) have vertical current-carrying channels. In older designs (inset), the channels lie flat under the gates.

In an effort to keep squeezing more components onto silicon chips, Intel has begun mass-producing processors based on 3-D transistors. The move not only extends the life of Moore’s Law (the prediction that the number of transistors per chip will double roughly every two years) but could help significantly increase the energy efficiency and speed of processors.

The on-and-off flow of current in conventional chips is controlled by an electric field generated by a so-called gate that sits on top of a wide, shallow conducting channel embedded in a silicon substrate. With the 3-D transistors, that current-carrying channel has been flipped upright, rising off the surface of the chip. The channel material can thus be in contact with the gate on both its sides and its top, leaving little of the channel exposed to interference from stray charges in the substrate below. In earlier transistors, these charges interfered with the gate’s ability to block current, resulting in a constant flow of leakage current.

With virtually no leakage current, a transistor can switch on and off more cleanly and quickly, and it can be run at lower power, since designers don’t have to worry that leakage current could be mistaken for an “on” signal.

Intel claims the new transistors can switch up to 37 percent faster than its previous transistors or consume as little as half as much power. Faster switching means faster chips. In addition, because of their smaller footprint, the transistors can be packed closer together. Signals thus take less time to travel between them, further speeding up the chip.

The first processors based on the technology will shortly appear in laptops. But the electronics industry is especially excited by the prospect of conserving power in handheld devices. That means designers can upgrade the performance of a device without requiring bulkier batteries, or reduce battery size without lowering performance. “Ten years ago everyone only cared about making chips faster,” says Mark Bohr, who heads process technology at Intel. “Today low-power operation is much more important.” He adds that the power savings and performance gains will be magnified in handheld devices because the smaller transistors will make it possible for a single chip to handle functions such memory, broadband communications, and GPS, each of which used to require its own chip. With fewer chips and smaller batteries, gadgets will be able to do more in tinier packages.

The new transistor design leaves room for enough further improvement to see the industry through the next five years. Intel’s previous chips could pack in 4.87 million transistors per square millimeter; the new chips have 8.75 million, and by 2017, about 30 million transistors per square millimeter should be possible. “This buys silicon another few generations,” says Bohr.