Self-Assembly to Make Faster Chips
IBM has developed a process for making speedier and more energy-efficient chips.
The self-assembly of nanoscale structures, in which molecules arrange themselves in precise ways according to fundamental laws of physics, has long been a dream of chip designers. That’s because it could be far cheaper to make ultrasmall precise features with self-assembly than with existing chip-making techniques. Now IBM researchers have taken a step toward using self-assembly in making future microprocessors.
The company has announced a novel process that uses self-assembly techniques to create air gaps that insulate wires in microprocessors. Early results show that these air-gap insulators can increase the speed of a chip by 35 percent or allow it to consume 15 percent less power than chips without the air-gap insulator. The company expects that the new process will be implemented in semiconductor facilities by 2009.
The new self-assembly approach ushers in to chip making an era of nanotechnology, says Daniel Edelstein, IBM fellow and chief scientist for the self-assembly air-gap project. Importantly, Edelstein says, IBM’s process is designed to be compatible with current manufacturing facilities and materials.
One of the bottlenecks in the development of today’s chips is the copper wiring that passes data between transistors and out of the chip. As chips shrink, these wires, which are about 70 nanometers wide, need to be fabricated closer together. However, the closer the wires are to each other, the more likely their electrical currents are to interfere with each other, sapping energy and slowing data flow. Insulation can help, but today’s insulating material–glass–won’t be good enough for future generations of chips. Engineers know that air is a better insulator, and they have been working to develop ways to create air gaps small enough–about 35 nanometers in diameter–to work. But the current state-of-the-art manufacturing equipment can’t reliably produce air gaps that small.
So instead, IBM researchers used a new type of polymer to help them create the air gaps. The polymer is poured onto copper wires that are embedded in an insulating material. When the polymer is heated, the molecules pull away from each other to form a regular array of nanoscale holes. These holes are used as a template to etch hollow columns into the insulating material that surrounds the wires. Engineers then pump plasma, an electrically charged gas, through the holes to blast away the remaining insulating material. A quick chemical rinse leaves behind clear gaps of air on either side of the copper wires.
“I think this particular demonstration is very heartening for other people who work on self-assembly because they see this getting more and more real and moving toward more industrial-type implementation,” says Babak Amir Parviz, professor of electrical engineering at the University of Washington, in Seattle.
IBM’s Edelstein says that because the new process adds manufacturing steps to the overall chip-making process, there will be a slight increase in cost. There are 10 layers of wiring in a chip, and he estimates that the cost will increase 1 percent per layer. Some chips, Edelstein says, would be built with a single layer of air gaps, while others might have four or more, depending on the need of the customer. IBM plans to license the technology to its research partners, which include Advanced Micro Devices, Sony, Toshiba, and Freescale Semiconductor.