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Logic from Chaos

New chips use chaos to produce potentially faster, more robust computing.

A reconfigurable chip developed by ChaoLogix in Gainesville, FL, makes it possible to morph a circuit from one type into another in an instant. Having the ability to effectively redesign chips an unlimited number of times after they’ve been manufactured could make chips faster and more robust. And, ultimately, it could bring down the cost of producing integrated circuits, by reducing the need to make expensive, custom-built chips.

The novel chips work by exploiting inherent “chaotic” behavior within the integrated circuits, enabling a single, simple circuit to behave like any kind of logic gate. Such a chip could be transformed, for example, from a graphics card into a memory chip and back again – in just two computer clock cycles. “We have blurred the line between software and hardware,” says William Ditto, chief technology officer of ChaoLogix, which was spun out of research at the University of Florida.

In many respects, the concept is similar to the development of software-defined radios [SDRs], says Ditto. These are devices that use a combination of custom-built integrated circuits and existing reconfigurable chips to provide a flexible mix of hardware and software, to make wireless devices that can adapt to operating at different radio frequencies and standards. But whereas SDRs can make only radio devices and consist of several chips designed to perform wireless functions, ChaoLogix’s chips could, in theory, replace all of these chips in a single device.

Existing reconfigurable chips, called field programmable gate arrays (FPGAs), contain programmable interconnects that can be rewired to perform different functions. But FPGAs are relatively slow to reconfigure, typically taking milliseconds for each rewiring, or about one million times slower than ChaoLogix’s chips.

Because of this limitation, FPGAs tend to be reconfigured only once to form a single permanent circuit, usually as relatively cheap alternatives to building dedicated chips. “Making a dedicated chip is very expensive,” says Allan Cantle, CEO of Nallatech, in Glasgow, Scotland, which develops software for FPGAs. “You can easily spend tens of millions of dollars just making your first working chip.”

Rather than using programmable interconnects, ChaoLogix’s approach is to use fixed circuits and instead exploit their inherent “noise” or chaos to make them produce different outputs without changing them. Normally, the circuits on a chip consist of arrangements of transistors designed to behave like a specific type of digital logic gate, such as a NAND and NOR gate. But if the inputs voltages to these circuits fall below certain thresholds, their behaviors become chaotic, producing undesirable outputs.

ChaoLogix’s trick is to put these chaotic states to use. They’ve designed a logic gate circuit that’s capable of behaving like any kind of logic gate – if the input voltages are just right.

The common notion that chaotic systems are unstable and unpredictable is not accurate, says Ditto. Such systems can be extremely sensitive to changes, and it is possible to produce desired states reliably and reproducibly provided you ensure only minor changes are made to the inputs.

“Just making small changes to the input, you can adapt [a circuit] to do totally different things,” says Celso Grebogi, professor of nonlinear and chaotic systems at University of Aberdeen in Scotland. This creates a greater degree of flexibility, because it makes more states available in a given system, he says. Because of this, Grebogi sees engineers increasingly turning toward chaos to get more out of their hardware.

“This would be very useful for mainstream computing applications,” says Julian Miller, lecturer in electronics at the University of York in England, who has used FPGAs for evolutionary computing applications. Currently, for his purposes, FPGAs are simply too slow. “It’s a huge problem,” he says. Being able to reconfigure a chip within a single clock cycle would be a great benefit, he says.

ChaoLogix has gotten to the stage where it can create any kind of gate from a small circuit of about 30 transistors. This circuit is then repeated across the chip, which can be transformed into different arrangements of logic gates in a single clock cycle, says Ditto.

Despite having attracted the attention of both Intel and AMD, the technology is still in its early days, says Ditto. ChaoLogix is raising $2 million to produce a range of prototypes. But even if the company can gain only a tiny slice of the chip markets, it “will be huge,” says Ditto.

Besides being extremely fast, the use of a single circuit has huge advantages over FPGAs. The way FPGAs are designed takes up a lot of silicon real estate and consumes a lot of resources. With ChaoLogix’s chips, “you have one car in a smaller garage, and it can change between one hundred different car types,” says Ditto.

It’s not the first time anyone has tried to develop single clock cycle reconfigurable chips. “It is well-trodden ground,” says Cantle. “Most of the companies that have tried have come and gone.” One of the challenges lies in the software required to reconfigure the chip, says Mark Parsons, commercial director of the Edinburgh Parallel Computing Centre in Scotland, who is using FPGAs to make a supercomputer as part of joint industry and academic project. “They are still very difficult to program,” he explains. Not only is it complex to design each configuration, but each software template describing the configuration takes up computational resources.

Others agree. The success of a reconfigurable chip does not depend only on what it can do, says André DeHon, assistant professor of computer science at the California Institute of Technology in Pasadena. If it proves to be too complex for most programmers, it may never get off the ground.

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