Chips Go Nano
Shrinking computer chips have propelled the information revolution. But chip makers are approaching unknown territory.
For the semiconductor industry, what started out as a cute description of a technology trend has become something like a force of nature. It’s called Moore’s Law. In fact, it’s not a law at all, but a rule of thumb that Silicon Valley pioneer Gordon Moore cooked up back in the 1960s. Moore, co-founder of Intel, noticed that the number of transistors being packed into integrated circuits was doubling every year, and he predicted this trend would continue.
The strange thing is, it turned out to be more or less true. Moore’s observation has become the de facto law behind the meteoric rise of the computing industry. Ever since 1975, the number of transistors on a semiconductor chip has doubled roughly every 18 months, enabling microprocessors and memories to get larger and more complex-and far cheaper. Powering this trend is the shrinking of transistors with each chip generation.
This rapid diminution of microelectronics makes possible today’s information revolution. For chip manufacturers, the pace has been brutal but lucrative. “Throughout the 1980s,” says Paolo Gargini, director of Intel’s strategic research, new generations of chips “were on a three-year cycle. But in the 1990s, we’ve begun moving to a two-year cycle.”
But the joyride can’t continue forever-at least not with the technology now in use to make electronics. According to the latest roadmap charted by the Semiconductor Industry Association (SIA), the minimum size of features in integrated circuits will have to hit 130 nanometers by 2003 to keep pace with Moore’s Law. That should be doable by adapting existing fabrication methods. But after 2003-the deluge. Following that year on the SIA roadmap is a lot of red, the color used by the trade association to indicate a lack of consensus about how to solve the fabrication challenges looming beyond the 100-nanometer barrier.
The problem is that the dominant technology used to make chips, optical lithography, uses light to carve silicon. Below 100 nanometers, however, the wavelengths of the light that is typically employed in chip fabrication become too large to do the job. Not that there is a shortage of possible alternatives to optical lithography. Indeed, every one of the large chip makers has its own favorite candidates. But no one is sure which method will win out. And since it takes several years to get a chip fabrication plant up and running, the clock is ticking.
In the meantime, the large semiconductor manufacturers are worried. “You always jump into these [new] technologies with the best of intentions,” says Intel’s Gargini, “but until you can actually print circuits that you can sell, you never know.”
In December, the companies that make up SIA and Sematech (the consortium of U.S. semiconductor makers) gathered to narrow down the choices. The 120 industry wizards in attendance picked two post-optical strategies for further development. The first choice was a photon-based technique called extreme ultraviolet (EUV) lithography, which is backed by a powerful alliance that includes Intel and Motorola; an electron-beam lithography method called Scalpel, under development by Lucent Technologies, was runner-up. IBM’s candidate-X-ray lithography-came in third.
The decision has no binding effect-the companies can continue to develop any method they please. Indeed, rather than signaling a final decision, the voting points to the intense competition sure to come. “This will be the start of a big shootout over next-generation technologies,” says Don Kania, chief technology officer at Veeco, a leading manufacturer of lithography tools. Adds Intel’s Gargini: “The key thing is that instead of triplicating the effort, we can synchronize.”
each of the contenders uses a different method to carve silicon, but they share a basic method: use of a stencil-like mask and basic etching techniques. Chips are now made with a gadget much like a large, highly accurate slide projector. Instead of blowing up your vacation pictures on the living room wall, however, an optical lithography machine shines light through an exquisitely crafted mask of the circuit pattern and images this on a layer of organic film, called a photoresist, that covers a silicon wafer. The organic film hardens on exposure to light; in the areas not exposed, the photoresist is washed off by solvents. This leaves regions of bare silicon that can either be etched to form channels or have other materials deposited on top to create the logic or memory elements in the integrated circuit.
The shorter the wavelength of light that is projected through the mask, the smaller the structures you can make on the chip. Leading chip makers, like Intel, have already moved deep into the ultraviolet region of light and use the 248-nanometer- wavelength light from a krypton fluoride excimer laser. This “deep UV” technology makes possible the etching of features as small as 200 nanometers and it is now being employed to crank out Intel’s latest microprocessors, the Pentium IIs, each packing about 7.5 million transistors.
the winning technology at the December meeting, EUV lithography, is based on a simple premise: make the wavelengths even shorter, and the feature sizes will shrink in tandem. That, however, is easier to envision than to execute. For one thing, the wavelengths of EUV light-40 nanometers down to 1-aren’t transmitted by any known materials, so conventional lenses are useless; the entire system must be made from reflective optics in order to focus the EUV light. There’s no smoke, but it does rely on an extremely complex arrangement of very accurate mirrors.
“The mirrors have to have an unprecedented degree of perfection,” explains John Bjorkholm, principal scientist at Intel’s advanced lithography department. The surface roughness cannot exceed the thickness of a few atoms. For a mirror 2.5 centimeters in diameter, this is like plowing the United States flat from New York to San Francisco, making sure no bumps more than 4 centimeters high remain. And once that problem is licked, the mirrors must be coated-bare metal or glass surfaces would absorb too much radiation. But, says Bjorkholm, “there has been exceptional progress” in manufacturing the mirrors.
The show-stopper for EUV, however, could be the mask. It’s not that masks can’t be constructed at this scale, but once they’re made, there is no known scheme for fixing the defects that inevitably turn up in them. In commercial lithography schemes, designers routinely tweak individual elements in the mask to eliminate blemishes. For the reflective masks needed in EUV lithography, however, nobody knows how to repair these delicate, multilayer coatings. “Reducing these defects is the number one challenge,” says Gardini.
EUV technology has been embraced by a consortium comprised of Intel, AMD and Motorola. These heavyweights have formed an entity called the EUV Limited Liability Company, which in turn has teamed up with three national laboratories in the United States to form a “virtual national lab” to develop EUV techniques. The group has already built a test system that can produce lines in a photoresist down to about 80 nanometers, and it has designs that should go down to 50 nanometers. The plan is to have a working prototype ready in the fall of this year.
Go Where I Send Thee
the technology that the sematech experts picked as runner-up, the Scalpel system being developed by Lucent, uses electrons, rather than light, to make the chips. Electrons are an alluring medium for etching because unlike light, they act more like particles than waves: They tend to go where you point them.
Lucent’s decision to go with Scalpel is a simple matter of risk versus benefit, says Lloyd Harriott, program manager at Lucent. “We had programs in all the next-generation technologies, including EUV,” he says. “In fact, we initiated the EUV technology back in the 1980s.” That was at the old Bell Labs, and money for basic research was becoming tight. As a result, rather than playing the field, Bell Labs had to choose one lithography technique to champion.
Most of the other next-generation lithography technologies will need several breakthroughs before becoming commercially feasible, says Harriott. “If you look at Scalpel, the source is a filament, the optics are not much different from an electron microscope, and the photoresist is the same one currently used with deep UV lithography.” To become feasible, he adds, Scalpel needs just one big advance: “The mask is the most unique problem.” This is because Scalpel’s mask is a radical innovation; the pattern is created in tungsten stuck on a thin membrane of silicon nitride, whereas conventional masks are made of chrome on glass.
Lucent built a proof-of-concept machine in 1996, and a lithography test bed in 1997 that can make features as small as 40 nanometers. The company is developing a commercial system that would be able to reliably make chips with 100-nanometer features that it hopes to market by 2002.
these methods are very promising, and one or more of them will surely be the way to keep Moore’s Law from going bust. Yet chip making is a notoriously conservative and financially competitive business, and companies won’t embrace major change until the industry is painted into a corner. And, with the price of a new fabrication plant starting at around $3 billion, no one can blame them for wanting to be sure before betting all their chips on one particular number.
“If you were starting out today to design a car from scratch, the last thing you might choose to power it is an internal combustion engine,” says Veeco’s Kania. “But that is the current technology, and no automaker is going to change it until they’re forced to.” Likewise, chip makers are working hard to get every last nanometer out of optical lithography before turning to new technology.
Indeed, the most telling scuttlebutt at the Sematech meeting in December was that some in the semiconductor industry are thinking about staying with optical lithography for yet another generation of chips, using light with wavelengths down to 157 nanometers. This would allow them to make feature sizes as small as about 90 nanometers, breaking the 100-nanometer barrier. It would require substantial changes: new fluorine excimer laser technology, and optics made not of sturdy fused silica, but of delicate calcium fluoride. The extension could buy chip manufacturers a few years.
The semiconductor industry’s reluctance to take a chance on new technology is understandable. Intel, the largest chip maker in the world, cranks out 100 million microprocessors every year. Any new technology has to feed this voracious production line reliably and profitably-something that optical lithography has been doing remarkably well for years. “Many times optical lithography has continued to surprise us by always pushing into another generation of chips,” points out Intel’s Gargini.
But sooner or later, the makers of integrated circuits will have to free themselves from optical lithography. That is, if they want to keep Moore’s Law from being put under house arrest.
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