The hallmark of advancement in the electronics industry has been the ability to squeeze more and more transistors onto computer chips. But as the chips have become denser, it has become trickier to make their tiniest features with the traditional method, photolithography, in which light is used to etch patterns. By 2020, the smallest features on chips could be as minuscule as five nanometers, down from 14 nanometers today. That’s why the idea of replacing silicon with nanotubes, tiny cylinders of carbon atoms, has been appealing since the 1990s. These tubes are smaller than a nanometer wide, which means they could be packed very densely on chips. And because they have low electrical resistance, computers based on them could perform better and require less energy. It has been hard to scale up the material to replace the billions of transistors in today’s electronics, which requires aligning and spacing the nanotubes in a very specific way. However, several labs and companies still think nanotube-based chips will be commercialized someday. Here’s an update on their progress.
Scaling up structures
A research team led by Stanford professors Subhasish Mitra and H.-S. Philip Wong showed in Nature in 2013 that they had created the first computer whose transistors were made completely from carbon nanotubes (see “The First Carbon Nanotube Computer”). Since then, these professors have made some improvements to increase performance. They include what Wong calls a “high-rise chip” of two stacked layers of memory encased between two transistors, which the researchers showed at a meeting of the Institute of Electrical and Electronics Engineers last December. The researchers also have a new method for making the chips, which yields a density and on-off switching rate that make them as good as silicon.
In a recent ACS Nano paper, a team at the University of Wisconsin, Madison, led by Michael Arnold and Padma Gopalan demonstrated a method for making high-performance carbon nanotube arrays, a long-standing goal of researchers. The team made a thin layer of nanotubes in water. When the researchers pulled a substrate out of the water, surface tension and evaporation caused the nanotubes to align on the substrate.
IBM hopes that carbon nanotubes could be used in commercial transistors by 2020. To make that practical, several problems need to be solved. One is that companies will need a way to detect very slight changes in the properties of nanotubes. George Tulevski, a member of IBM’s carbon nanotube team, recently reviewed the challenges in ACS Nano.
One application of carbon nanotubes that might be closer to fruition could be to combine them with silicon transistors in memory chips. A company in Massachusetts, called Nantero, has been plugging away at this since 2001. The company says it has already moved its technology out of the lab and tested it in chip-manufacturing facilities. Before nanotube memory could be used in commercial devices like phones or wearables, companies would have to design new circuits for it. It is unclear when that could happen, but Nantero CEO and cofounder Greg Schmergel says the work is under way and estimates that some circuit designs could be done by next year. Last year the company reported that Chuo University in Japan had tested the technology and found it highly reliable.
IBM thinks the technology could be mature enough to move to a microprocessor fabrication facility within a few years. This would lead to a few more years of development work, which would involve testing more advanced circuits. After that, the product could be commercialized.
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