Many microchips today incorporate multiple processing units, known as cores, to boost performance (see “Designing for Mobility”). These cores share system resources such as memory. Widely cited U.S. patent 5,617,537, awarded to Japanese communications giant NTT in 1997, arbitrates between cores as they access system memory, so that one core does not, for example, accidentally overwrite information that another core has placed in memory.
A patent map created by IPVision, based in Cambridge, MA, shows a key invention by Japanese communications giant NTT. Awarded in 1997, the patent is important to the growing trend toward so-called multicore chips in computers; these chips incorporate multiple processing units, known as cores, which share system resources, such as memory. The advantage of a multicore system is that, in theory, a pair of two-gigahertz cores, for instance, could work together to do the job of one four-gigahertz core but with a lot less power–an important consideration for mobile devices. In practice, it can be difficult to coordinate the cores so that they work together seamlessly. This widely cited patent describes a way to handle a big piece of the coordination puzzle: how to arbitrate between cores as they access system memory, so that one core does not accidently overwrite information that another core has placed in memory.
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