For decades, engineers have tweaked chip design to store more data in a smaller space. But as chip components continue to shrink, engineers are looking at alternatives to silicon that might provide better performance at small sizes. One possible approach is to use carbon in the form of nanotubes–tiny, rolled-up sheets of carbon atoms–or in the form of graphene–single, flat sheets of the atoms. However, neither of these structures is easy to mass-produce and to integrate onto chips using existing manufacturing processes.
But now, researchers at Rice University in Houston have shown that graphene’s cousin, graphite, can be used to make a fast, high-density memory device with some of the advantages of flash memory typically found in memory cards and MP3 players. Graphite, the same material found in pencils, comes in multiple sheets and flakes, and can be deposited onto silicon using standard deposition processes, unlike nanotubes and graphene.
The graphite memory device, built by James Tour, professor of chemistry at Rice University, and postdoctoral researcher Alexander Sinitskii, is similar to flash in that it has no moving parts, which means it’s more robust than a magnetic hard drive. But unlike flash memory, which stores bits as electrical charge, graphitic memory won’t wear out as quickly. And graphite memory cells can be vertically aligned and stacked, which means that a chip using graphite has the potential to store 10 times more bits in the same space than today’s flash memory.
A graphite memory cell is composed of sheets of graphite deposited between two electrodes. The two-electrode design of graphitic memory differs from that of flash memory, which requires a “source,” a “drain,” and a “gate” to hold electric charge–essentially the bits of data. Because flash memory must store charge on the gates, which tend to leak, the cells wear out over time.
Graphitic memory works differently. When a certain voltage is applied to a memory cell, the strip of graphite cracks, explains Tour. The presence or absence of a crack–represented as a 0 or a 1–can be read by applying a lower voltage across the electrodes. Applying a larger voltage smoothes the crack, essentially erasing the bit. Tour admits that he isn’t sure of the exact mechanism that occurs during the process of writing data, but he suspects that the voltage creates a filamentary structure within the carbon that interacts with the surrounding silicon, producing a characteristic electrical signature.
The two-electrode structure of graphitic memory is what enables it to be built in a three-dimensional memory cell, explains Tour. The three-component structure of flash memory makes it overly complicated to connect memory cells vertically. Graphitic memory, on the other hand, can easily be deposited between two layers of electrodes.
Tour’s group isn’t the only one exploring three-dimensional memory. IBM’s Stuart Parkin is developing so-called racetrack memory that stores data by altering the magnetic properties of nanowires deposited on silicon. And chip manufacturer SanDisk is developing a three-dimensional memory that uses vertically stacked arrays of diodes.
In the coming years, it will be increasingly important to develop three-dimensional memory, says Tour. “If you’re not in the 3-D memory business in five years, you’re not going to be in the memory business.”
The work has gotten the attention of industry forecasters. “The concept is interesting and potentially promising,” says Victor Zhirnov of the Semiconductor Research Corporation. He notes, though, that it’s still too early to give the technology a full endorsement, as the underlying mechanism of the memory is not yet clear.
Nonetheless, performance of the early prototypes of graphitic memory is promising, says Tour. The cells can be written to and read from at speeds comparable to today’s flash memory. And the voltages that are required to operate them are lower than those required for flash.
In addition, the technology could extend beyond memory to another part of the electronics industry that builds chips called field-programmable gate arrays (FPGAs). These chips are reconfigurable for different tasks, from controlling radios to crunching numbers, but today’s FPGAs are limited in the number of times they can be reconfigured. If the components between layers in FPGAs were connected using graphitic pillars or strips, says Tour, then they could be almost infinitely rewritable.
The Rice University researchers have partnered with startup NuPGA, a company that will use the graphite technology to make FGPAs. In addition, Tour says, an unnamed company supports the memory work. Tour suspects that it could take at least eight years to turn the prototypes into products, because of the need to ensure reliability and optimize the manufacturing process.
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