Even with the electronics industry in the economic doldrums, memory-card maker SanDisk is betting that customers will be willing to pay to put more data in their pocket.
The company has announced a significant advance in flash-memory technology that enables 64 gigabits of data to be stored on a chip the size of a fingernail. The new, more spacious flash chips do this by holding four bits per memory cell, as opposed to the standard one or two bits per cell. SanDisk presented details of the advance at the International Solid State Circuits Conference in San Francisco on Tuesday.
“Developing a four-bit-per-cell chip is a massive challenge, and we consider this to be a major breakthrough,” says Khandker Quader, senior vice president of memory technology and product development at SanDisk. Quader adds that the work presented at the conference, which focuses on ensuring that data is stored reliably, has implications for generations of flash memory to come.
Flash memory has become a mainstay of the electronics industry. It is used in many gadgets, including cameras, game consoles, cell phones, and the latest laptops. Because data is stored on a flash chip as electrical charge on transistors, flash memory is subject to the famous credo set forth by Gordon Moore of Intel decades ago: that the number of transistors on a chip will double every two years. In other words, thanks to the shrinking size of transistors, flash memory just keeps getting more capacious.
In recent years, however, engineers have found another way to increase the capacity of flash drives, without waiting for the transistors to shrink. They do this by storing more than one bit of data per transistor, within what are referred to as multilevel cells (MLCs). In a single-level cell, data is stored using two distinct states, defined by different voltage levels. In contrast, a four-bit MLC stores information in 16 states, which translates into four bits of data per cell, or four times the amount of information.
This trick is by no means easy. Ensuring that each memory cell maintains precisely the right voltage, without disturbing that of neighboring cells, is a major challenge, says Quader. Another issue is reducing the time that it takes to write to these cells.