IBM researchers have discovered a way to massively improve the performance of transistors made out of sheets of the two-dimensional carbon material graphene: they stack them up. By placing two layers of graphene on top of each other, they found that they can reduce the electrical noise of the device by a factor of 10.
The findings could help realize graphene-based chips that run faster, are more compact, and consume less power than today’s silicon chips, says Yu-Ming Lin, a scientist at the IBM T. J. Watson Research Center, in Yorktown Heights, NY. IBM researchers are also investigating other promising successors to silicon, such as graphene-like carbon nanotubes. Graphene, which is made entirely out of carbon atoms arranged in a one-atom-thick honeycomb structure, has a number of properties that make it attractive for electronics, particularly for transistors that produce radio-frequency signals. But transistors created from the material have been plagued by noise, making the signals they produce less than ideal for communications. The researchers’ discovery could help make graphene transistors practical.
“The semiconductor industry is looking very extensively for new materials that can outperform silicon,” says Lin. Graphene is one prime candidate, he says, as “for a given voltage, graphene can carry a much higher current, because the electrons simply move faster in the graphene than in silicon.”
This enhanced electron mobility, typically anywhere from 50 to 500 times faster than silicon, makes it possible to process more information with less power, enabling extremely fast switching speeds. Graphene can also potentially be cut to sizes far smaller than silicon can, making possible more-compact transistors and chips.
But there is a serious challenge to making tiny, practical devices out of graphene, says Pablo Jarillo-Herrero, a graphene researcher at MIT. “One of the major problems as devices become smaller and smaller is that the noise becomes larger and larger,” he says. This is because the tiny currents trickling through the devices become increasingly susceptible to environmental influences. For example, charged particles in the substrate near the device can exert an influence on the current flowing through the graphene. This can act like a barrier to current flow, causing it to deflect and garbling the signal produced.
But Lin, working with his colleague Phaedon Avouris, discovered that placing two layers of graphene, one on top of the other, has the unexpected property of significantly reducing this problem. The results are published in the latest issue of the journal Nano Letters.
Lin makes the graphene layers using a common and surprisingly low-tech approach, known as mechanical exfoliation. “We take a piece of Scotch tape and peel off a layer from a chunk of graphite,” says Lin. The structure of graphite is essentially the same as that of a large stack of graphene, and the carbon atoms have a natural tendency to want to stay in these layers. “So we then normally just repeat the process until eventually, we have a single layer,” he says.
When placed between two electrodes on an oxide substrate, this arrangement forms a field-effect transistor, the basic building block of chips. The same approach is used with the two-layer transistor, only the exfoliation process is cut slightly short, with the final number of layers of graphene being determined using atomic force microscopy. Both layers retain their desirable high electron-mobility properties. But now currents running through both layers couple together so that each electron is paired with a positive charge, effectively keeping it on course, says Lin. The pair resists being deflected by random positive and negative charges in the materials.
While decreasing the noise in graphene transistors is an important step, other obstacles, such as finding ways to make high-performance graphene transistors in large numbers, need to be overcome before such devices are ready for commercialization.
Hear more from IBM at EmTech 2014.