Nanotube array: This photo shows a three-inch silicon wafer covered with an array of carbon-nanotube transistors. Though these transistors were made using simple processes at room temperature, their performance is good enough to drive display pixels.
ACS/Nano Letters

Computing

Practical Nanotube Electronics

Researchers develop a new method for making efficient nanotube transistor arrays.

  • Monday, November 23, 2009
  • By Katherine Bourzac

Carbon nanotubes are a promising material for making display control circuits because they're more efficient than silicon and can be arrayed on flexible surfaces. Until recently, though, making nanotubes into transistors has been a painstaking process. Now researchers at the University of Southern California have demonstrated large, functional arrays of transistors made using simple methods from batches of carbon nanotubes that are relatively impure.

The pixels in a computer or television screen, whether it's an LCD or plasma, are each controlled by several transistors. In today's devices, these transistors are made from silicon. Arrays of these transistors need to be made at high temperatures and in a vacuum, so they're very expensive, says Chongwu Zhou, an associate professor of electrical engineering at USC and researcher on the nanotube project.

Transistors have also been made from carbon nanotubes, but that, too, presents challenges. "Many people use one nanotube to make a very small, high-performance transistor" for computer chips, says Zhou. But that one-to-one ratio won't work for displays, in which a large surface must be covered in transistors. "If we use one nanotube for one transistor, the yield will never be high enough" to work for large-scale manufacturing of big screens, he says. Zhou believes his approach will solve this problem by making larger transistors from mats of nanotubes.

The USC researchers make large arrays of carbon nanotube transistors using solution-processing techniques at room temperature. They start by placing a silicon wafer in a chemical bath to coat its surface with a nanotube-attracting chemical, then rinse off the residue. The treated wafer is then immersed in a solution of semiconducting carbon nanotubes, which are attracted to its surface. The wafer, now coated with a carpet of nanotubes, is rinsed clean again. To make transistors from this tangled mess, the researchers put down metal electrodes at selected locations. The electrodes define where each transistor is and carry electrons into and out of the nanotubes that lie between them. Areas of silicon underlying each device act as the transistors' gates. So far, they've built a prototype device on a four-inch silicon wafer and used it to control a simple organic light-emitting diode display. This work is described online in the journal Nano Letters.

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Other researchers have made transistors from nanotube carpets using solution-processing, but these projects started from mixtures of conducting and semiconducting nanotubes, leading to very poor performance. And late last year, researchers at IBM and Northwestern University used highly purified semiconducting nanotubes to make higher-performance transistor arrays in which all the nanotubes line up in nearly straight lines, which improves their electrical properties.

The significance of the USC work is that it shows that arrays made from only 95 percent semiconducting nanotubes that aren't aligned still have good enough performance for displays, says Zhou.

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