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It's important to explore approaches such as these, says Naresh Shanbhag, professor of electrical engineering at the University of Illinois, Urbana-Champaign. "Nanotubes are considered to be a promising post-silicon device," he says. "Nanotube circuits need such techniques ... so that a circuit exhibiting reliable behavior can be designed."
The Stanford algorithm does not solve all the problems with carbon-nanotube transistors, however. In a typical batch of nanotubes, as much as 30 percent of them act as a metal, constantly conducting electricity (unlike a semiconductor), making them useless as transistors. Another issue, says Mitra, is that it's difficult to control the density of carbon nanotubes from one batch to the next. And if there isn't a sufficient density, then there simply aren't enough nanotubes to make logic gates for circuits.
Progress is being made on all these fronts, says Tom Theis, director of physical sciences at IBM's TJ Watson Research Center, in Yorktown Heights, NY. Researchers at IBM, for example, are developing ways to selectively remove unwanted nanotubes--metal nanotubes where semiconductor nanotubes are wanted, for example--to help pave the way for reliable devices. While the Stanford work doesn't resolve all the challenges facing nanotube electronics, Theis says that it's "an interesting piece of the puzzle."
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This document is part of the “How-To Guide for Most Common Measurements” centralized resource portal. This tutorial provides a detailed guide for measurement and device considerations to take temperature measurements using thermocouples. Get an introduction to thermocouples, which are inexpensive sensing devices widely used with PC-based data acquisition systems. Also review some specific thermocouple examples and learn how thermocouples work and ways to integrate them into a data acquisition measurement system.
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5 Comments
Two input NAND gates
I a two input AND gate the output is high when both the inputs are high and low in all other cases.But when the gate is inverted that is in NAND gate i assume that the output is low only when both inputs are high.
the para explains "specific type of digital logic gate called a 2-input NAND gate, which contains two parallel transistors that can messed up by misaligned nanotubes. If electrical current flows through one or both of the transistors, then the gate is "on." If electrical current flows through neither, then the gate is "off." But if the transistors are haphazardly arranged, these gates can't operate properly.Is this not the case with OR gate.
According to Dr.Mitra the nano tubes are chemically etched away once they enter the wrong boundry.How are they etched away and if the are etched,are fresh ones to be replaced.
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