Efficient Hardware Repair

Comments

• 	The horror... frankieherrero on 04/10/2007 at 9:04 AM
  Posts: 3 Avg Rating:	"Manufacturers could skip the last few weeks of testing, knowing that ultimately, they can solve problems with patches." "Minor problems" like miscalculations? This approach will definitely pave the way to crappier electronic devices!!! Rate this comment: (Reply)

• A Dangerous Road MarkMorris on 04/10/2007 at 2:33 PM

  Posts: 1

  This is not helpful at all - with all the bad software out there, the only thing we can count on right now is hardware that is build "to spec", now if companies are allowed to play with those spec parameters, one can only imagine the kind of mediocrity that might ensue. Software is in a crisis mode because of this very flexibility. We can only hope that major chip makers, technology buyers and consumers will understand this hardware patch capability as all to reminsiscent of the technology sector with its patches galore and often substandard releases. Hardware is what is moving us forward. Please let it remain 100% to spec! Rate this comment: (Reply)

• 	just another annoyance urian1975 on 04/10/2007 at 3:30 PM
  Posts: 16 Avg Rating:	we already have to deal with the problems of software manufacturers pushing software out too quickly with several bugs requiring patches on almost a monthy basis......we as consumers cand handle any more possible problems and delays Rate this comment: (Reply)

• 	Hardware Viruses RichE on 04/13/2007 at 1:12 AM
  Posts: 1	The idea of programmable hardware, and defect repair by patch, is excellent. BUT can malicious hackers destroy all the world's patchable computers by a widespread hardware patch virus? If there is a way to do malicious damage, it will be found and used. Rate this comment: (Reply)

• FPGAs as a co-processor? buckminster on 04/13/2007 at 10:24 PM

  Posts: 2

  Rather than kludge around hardware problems, maybe the gate arrays could be put to better use providing high speed logic to perform specialized processing tasks? Computational heavy tasks,like signal processing or cryptography could be accomplished thousands of times faster using a gate level implementation than the same function could execute on the one or more CPUs. Existing hardware description languages,like Verilog, already provide a well established methodology for translating behavioral level algorithm descriptions into gate level implementations. Using a co-processor does introduce synchronization issues along the same lines as converting a serial process to a multi-threaded implementation. Anyway, just my $00.02 on the subject....   Rate this comment: (Reply)