Computing

Efficient Hardware Repair

(Page 2 of 2)

  • Tuesday, April 10, 2007
  • By Rachel Ross

Torrellas isn't the first person to build patchable hardware; Crusoe and Itanium microprocessors, used in some laptop and desktop computers, can also be patched. But Torrellas says that Phoenix offers a more efficient approach. Crusoe microprocessors, which are made by Transmeta, have an additional level of complexity: special software that translates all commands. Defects are fixed by changing the way commands are interpreted. The process works, but Torrellas says it slows down the chip far more than Phoenix does. Itanium chips, which were developed jointly by Intel and Hewlett-Packard, are also relatively inefficient when patched, according to Torrellas. Moreover, a wider variety of problems can be fixed on a Phoenix-enabled chip.

Phoenix can't fix all hardware defects, but Torrellas says it can recover from most critical bugs, such as those that would crash a computer. The Phoenix team performed a detailed analysis of past problems with AMD, Intel, IBM, and Motorola chips to determine which issues it should address first. Consequently, Phoenix is designed to focus on particularly problematic areas, such as the memory subsystem.

Whether Torrellas's technology will make its way into commercial computers, however, is uncertain. "Their analysis of where bugs occur is excellent," says Wilson Snyder, a principal engineer for the high-performance computer-hardware manufacturer SiCortex, based in Maynard, MA. "It provides a good, detailed look at signals that should be analyzed to discover bugs." Hardware manufacturers could learn from the basic research behind Phoenix, Snyder says, and use it to eliminate hardware problems before chips hit the stores. But he questions whether manufacturers would ever implement Phoenix itself. Adding Phoenix onto an existing chip would take time and money, he points out.

Torrellas believes manufacturers will be amenable to a system like Phoenix, particularly as hardware problems grow. "Chip designs are becoming more and more complicated," he says. "Bigger teams are designing the processors, so there is more scope for miscommunication." The more problems pop up, the more manufacturers will be willing to consider new solutions.

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frankieherrero

3 Comments

  • 1772 Days Ago
  • 04/10/2007

The horror...

"Manufacturers could skip the last few weeks of testing, knowing that ultimately, they can solve problems with patches."

"Minor problems" like miscalculations?

This approach will definitely pave the way to crappier electronic devices!!!

Reply

MarkMorris

1 Comment

  • 1772 Days Ago
  • 04/10/2007

A Dangerous Road

This is not helpful at all - with all the bad software out there, the only thing we can count on right now is hardware that is build "to spec", now if companies are allowed to play with those spec parameters, one can only imagine the kind of mediocrity that might ensue. Software is in a crisis mode because of this very flexibility. We can only hope that major chip makers, technology buyers and consumers will understand this hardware patch capability as all to reminsiscent of the technology sector with its patches galore and often substandard releases. Hardware is what is moving us forward. Please let it remain 100% to spec!

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urian1975

16 Comments

  • 1772 Days Ago
  • 04/10/2007

just another annoyance

we already have to deal with the problems of software manufacturers pushing software out too quickly with several bugs requiring patches on almost a monthy basis......we as consumers cand handle any more possible problems and delays

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Guest (RichE)

  • 1769 Days Ago
  • 04/13/2007

Hardware Viruses

The idea of programmable hardware, and defect repair by patch, is excellent. BUT can malicious hackers destroy all the world's patchable computers by a widespread hardware patch virus? If there is a way to do malicious damage, it will be found and used.

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buckminster

2 Comments

  • 1769 Days Ago
  • 04/13/2007

FPGAs as a co-processor?

Rather than kludge around hardware problems, maybe the gate arrays could be put to better use providing high speed logic to perform specialized processing tasks?

Computational heavy tasks,like signal processing or cryptography could be accomplished thousands of times faster using a gate level implementation than the same function could execute on the one or more CPUs.

Existing hardware description languages,like Verilog, already provide a well established methodology for translating behavioral level algorithm descriptions into gate level implementations.

Using a co-processor does introduce synchronization issues along the same lines as converting a serial process to a multi-threaded implementation.

Anyway, just my $00.02 on the subject....

 

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