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IBM's Chip-Shrinking Secret

Continued from page 1

By Kate Greene

Monday, February 27, 2006

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Although the group's technology is not yet ready for full-scale manufacturing, its results "demonstrate the potential to be able to do this," says Fred Zieber, a semiconductor analyst at Pathfinder Research.

Other companies who make chips may also be exploring similar lithography tactics; but Intel, which announced a 45-nanometer "test chip" in January (see "Moore's Law Lives"), has not given details about its lithography processes for that generation. John Casey, an Intel spokesperson, says they are looking at different options for technology smaller than 45 nanometers, which could include an immersion liquid, as IBM has, or also shorter wavelengths of light.

The lower limit of microprocessor size is still getting closer, though. So it's an open question how long Moore's Law -- the prediction that the number of transistors on a chip will double every 18 months or so -– will survive. Although the time between generations of new chips may grow longer as the physical limitations become more difficult, Bethune says, conventional lithography could still hold some surprises. "The ultimate limit with 193 nanometer light depends on the materials you use," he says. "It's not sharply defined."

Home page image courtesy of IBM. Caption: Left: a record-small array of lines and spaces that are 29.9 nanometers wide (about 3,000 times narrower than a human hair), created using a variation of optical lithography. Right (same magnification): 90-nanometer-wide features now in mass production in the microchip industry.

Comments

  • SoC
    The SoC is the future and we are pleased to see IBM way out front.
    R&B
    Rate this comment: 12345
    Guest (bbrv)
    02/27/2006
    Posts:1
  • quality
    it is great idea that you have decided to finally decided to increas the microchip to a greater chip that can handle more data.
    Rate this comment: 12345
    Guest (jamesglisson)
    02/27/2006
    Posts:1

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